Multicore¶

Object: Task Configuration

More and more of today’s controllers have processors with multiple CPU cores. In order to take advantage of this for the IEC program and improve performance, CODESYS provides options for distributing the IEC tasks over these CPU cores. Moreover, the IEC program should be divided into multiple tasks.

There are two basic different strategies in CODESYS for distributing IEC tasks over CPU cores:

Fixed linking of an IEC task to a CPU core:

The task is always executed on this specific CPU core. In this case, multiple tasks can also be bundled to one and the same CPU core if the IEC program is not yet able to be executed on multiple CPU cores at the same time.
The IEC task is executed on all CPU cores:

The operating system takes control of distributing the task on the CPU cores.

Hint

When the IEC tasks are distributed over CPU cores, some changes result in the behavior in the IEC program, which have to be considered:

The processing of IEC tasks by priority is no longer a given. They are processed by priority only if the tasks are bundled together to one CPU core.
The cycle consistency of the data in the IEC task with the highest priority is no longer a given. Therefore, the data has to be copied locally at the beginning of the IEC task cycle if the values should not change during the cycle.
For consistent counters (incrementer, decrementer), the atomic external library function SysCpuAtomicAdd() should always be used (for more details, see SysCpuHandling.library).

Hint

Data consistency

Bit access (data type BIT) is not processed consistently (atomically) on multicore CPUs in the IEC program. For this we recommend that you use the external library function SysCpuTestAndSetBit() (for more details, see SysCpuHandling.library).
Simple data types up to a width of 32 bits (BYTE, WORD/INT, DWORD/DINT, etc.) are processed consistently (atomically) in the IEC program on multicore CPUs as well.
Data types with 64 bits (LINT, LWORD, LREAL) are processed consistently (atomically) in the IEC program on 64-bit systems and multicore systems only. To do this, you do not need to take any precautions.
To access complex data types (STRINGs, FBs, STRUCTs, ARRAYs), you have to make arrangements yourself for the synchronization/consistency.
In the task configuration on the Variable Usage tab, you can define whether a variable in an IEC task has read or write access.
On multicore systems, a “memory reordering effect” can occur. For more information, see the IEC operator __MemoryBarrier().

Distributing tasks over multiple processor cores ¶

Requirement: At least two tasks are defined in your application, for example MainTask (IEC task) and LowTask (IEC task).

Open the Task Configuration object in the editor.
Click the Task Groups tab.

⇒ The overview shows a IEC-Tasks task group.
Click Add Group to add a new task group.

⇒ The group NewGroup is added.
Double-click the group name NewGroup and change it to LowGroup.
Select an assignment in Core, for example 1.
Open the task LowTask (IEC task) in the editor.
Select the new group LowGroup in Task Group.

⇒ The task LowTask is processed now by processor core 1 due to its group membership in LowGroup.

Displaying the processor load per processor core in the trace ¶

In CODESYS, you can display in a visualization the processor load in a DeviceTrace object. For more information, see the following help chapter about displaying device traces in the project:

Multicore¶

Distributing tasks over multiple processor cores¶

Displaying the processor load per processor core in the trace¶

Distributing tasks over multiple processor cores ¶

Displaying the processor load per processor core in the trace ¶